From 0736381925bc8c875d334b5169448e1fbb1ff141 Mon Sep 17 00:00:00 2001 From: Toby Jaffey Date: Sun, 14 Dec 2025 11:49:28 +0000 Subject: [PATCH] Slim down mini-rv32imaa by removing zicsr and atomics - which are unused. --- README.md | 2 +- precompiled/self.bin | Bin 4972 -> 3476 bytes uvm32/mini-rv32ima.h | 17 +++++++++++++++-- uvm32/uvm32.h | 2 ++ 4 files changed, 18 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index 0a6da9c..d39970e 100644 --- a/README.md +++ b/README.md @@ -2,7 +2,7 @@ uvm32 is a minimalist, dependency-free virtual machine sandbox designed for microcontrollers and other resource-constrained devices. Single C file, no dynamic memory allocations, asynchronous design, pure C99. -On an [STM32L0](https://www.st.com/en/microcontrollers-microprocessors/stm32l0-series.html) (ARM Cortex-M0+) the required footprint is under 4KB flash/1KB RAM. +On an [STM32L0](https://www.st.com/en/microcontrollers-microprocessors/stm32l0-series.html) (ARM Cortex-M0+) the required footprint is under 3KB flash/1KB RAM. uvm32 is a RISC-V emulator, wrapped in a management interface and provided with tools to build efficient code to run in it. diff --git a/precompiled/self.bin b/precompiled/self.bin index 40a7b05ac138ed52c9fd2315edb7cb0b2788966e..9c5e19c3745b1ecffa94ede75c4b75debe71f155 100755 GIT binary patch delta 2224 zcmaJ?Uu+ab82@JXcIWPBOJ($`qW0*PyNYNkD>-6}sl*l%n^=vSn2=zc2>4Wu+8Tr2 z;kMltFQhooM$6Krc?|$qe+0Ur zO|zO$UlHL};QMb?a}TrHF*90Ifu^QqNbt;-@H9uCT-b?DNdnalcA*;nBWS7#hN*p8WR*loB zaSSm?qv9-y#X=D)J^@BcND*ENj13{hXju%43b|8hkBHlqhob{g-ls*a@j_JWP~NKB z9^rR|A*Z94209|*XXRx&PG^N(oE6Wg&o?HtS*GP@yGuu}=90*ZE`gP_qkKONtI1+i zOsPkrgHb+6Lu$)pRJ&R)gr%fM+Rs zt{#3X9sSZuc8Vvo&8m7o5ov8*I(HvH>JG$O$Qbboh@lYVqUfneBx6SR61M8S@2rj4 zuo(KQ>exF7U+&e|QVMuX3$bu##G!wJHBN!)uc&OM2ZUdy>}{X$Ofkmyl%tHkLinH; z<1hLOqa}>0mteG&@OM3&x2Ay)cr8ME0YiW4X;diufVT-p)gAG!iJ1;!`bok=6jFY* z>UbWonQ36XMarfN=%xi=J^1L7uBb^HNtCPT^{vA9i5N|SL(!nayTCeO1E1B}g#H5X zg~FCxOopLwj>XamF!gD$5<2Y8=y*X%=lhE_d{;Td^j4i`i}h%M?hbq9|B?~Y(;&(P z>gX3i5>rnMU=DYJV|(ZYuPU;|D(16}#!x)}hnOj#z8BmNX-Q0X5JBs~P4|^cf_ByO zZ23|5i2kdUtceIe1@0h4c`78bonSPNMN(J@{C#h$psgUo)D2LdTB=sfrE%a&?HYFX z{b1IfBu4Y6vWRZ^XU)_O6Pf&C=5t8lgN`pf*g;sYmzJc{DStJX{yd23k-!S4oFI-j z18g)0{5fd-{OdRT?J24!w1cqk{)WiVn1`7O0UJ>>-^hhO) zo&sk3RelfM#K$6=gw};^p$3zDE{jQyUJ8NHw1}mC^c#01UlDc<$~!CWseA>;s(UfN z+>L<Gdr`0EMpqmYwncXzZU%5>~!38Td-f8AHGJCz)J z34H_#FL?=pDapz`*J(6(b8?NV(j9kwn3Az6?7I*l1ai=4~v%yFNIgK*rcS|LVn?92kqDSyk4PrhawD|Sp zTK&V#IX-vB*ti@PG^-j9$gxH>;>*~4>p{>?)!6V$*l1dg8gW?zjZ;$34|y1($j5wa zD^+sq@gMDPkKhkY9PJByB!q?Z@_TkdCPXjy!vl1^6vg#jkolr zn6EuZuBGW%Q=48w31cv|D!rHzvfHvM^2BW{cXy>s)tXw3+|_Ejc8e{o!*grbCL2He z%5`EScIS21spmG7+wV-fRuxH$NQRn;@yJjM8OzPD6}Ijw>Yx@Yxy<~U$HnfOjI=|V zOf8{Y;@m~C*EH1`Hgr%J6H6<5k=m=HFkZTPyrp68td2t6OdNW+mSwOE{mbd4M67SJ z{&38I9g@pd$Ba9*Sn|%pHL%g5%?To-(IUzC?GkzQQ{*juhgdEhB5_ku@qTKGl4~6D zohf3h9%ZqA+l+4yW1dCg&f3?0a8GIg1clefauy@qpP=)}I( z7%%T9-p}ahmtlhlpLMn{{$F0_TCw?gF0kr&X-% z&rTy2igUV1j>GC=#gAx3%+`}b!(Vt2^o#4DD*9`uHx$nTjf;sq%I!Mkhsy-gH)P~ z?utIHvw=itvLYL<$mG;SS8N!EYMth- zT&;O49@M<1$282-Fs5;SB{|T>Zlhw z>V;;k*r_E~tk#UXG%b18VKNXC$(5_g?KUa7Y&GYIp<>^(m44zTv|SFxZ$WO}N{RSw z@PGd$lDkZbhf$}hsuFVdN1hvrEH&QR6N)1qe4QtmStB+yBXuzAE70Tt(4ZI zz#4(Bb-$a_mGy*=mSc`CD7y-4_1x{*X*ZiCw=?7TsV^znkRrzBI+=3NvqsCcXD_BENM#iM%?Z}w30p)nHv@MFydgrF z81%Apu}sk&Yt`J+q$ao9&-k0OBzs#aC^l${A1i6HcZ3vQ8`s2`P3g&UxiW^i#Stgy z`3&`|hopT3SSNvNh~mg=S;}ax<9rMChurN&P1&-xf&89PG8%eNBOI(L*dmmLEt{R( zt=ThfHbd^yuytpg7?&`eEizkT+iSA6k@zg>wA{nziPM?2Sno^c^RhTS@zLgX_|0~Tq z@D}`(xM6P0x4Kc!>Sp9v8g)Dd8%>g%h3z`?zYHcPDPF1}zm$jmuM+ozQll2+QFC8S zlXwI%>6|PFdDy~QPj2)`*^f?hZM`6&r(bGdU9m^GED;B=ofD)k0bfe(#cP5d)Y{@? z*?oSbj9NA&_7Cf_XASPL&qB$e2#MaRb~jZjiyNJGX>FK|yS`ml#a*H9qg?Osw6vo* zyKOpmXc#rUt(-eCe35H(?sIP2W^(6L|MJ3^l*d{%j!VC^d>(5sf%^rulVdgLxexx% zl*Ln7eg2-aNf+C)@FDzKgkM!Ij1K|-zgZ?rkfE;T+Dk`N%y8^Fsd|nXju(!Rz&?%| zY%|_T#lOOQ--O}^m>)l__+jSjD*Q1uKX(;=*g1*3aZ5$bUD8OLX9nll63#PchW!~# z_EvmhSA3!T_9 zNIH*__=5Ah0lxYv^3hiI^{ojVI6n3lb6fYZzg+c?`uD2-QDHmlQ4^7OOOPMVdjCE( z{x=bJ?)M*Ne*8$zbdJo=c^2|bEN>glg`AK4pR4&Fxi-#!d~EjoN3`T1pAX$^YC%5g zK`DzE&f?86(E>afv}}hAaG~uR0WR*302lX%frI2r;AsJ#571()?E~OI zJN`Z}aQ}U27e`$SwR!6?yYg=BUS6@sAl@ywJ5VP!6LhsVH0Nr^-sQeAu&zo>7H_>$ zJ9-)x)(*%?_SAkQ^syG{9515|QSMCfPgmyKO$+B&_KfhJH(i;t=FV@<*;6G>E}S#6 zV&NQPV3hZ`alsxduO5$t#hGI4%J|547LHeNjD~Q=f;nrxyKs&%uqTW&su%3heD(M` zJ|lW%e9iY4j=L$2n}RRSWSUU7n?<;2OJ@UWGqv{x8FrU*QMU{C*`r!1BI6#lOz{`2O7Op=V`hu}0IM+|n+#jW-< z_6_qs$g^orvnLRN;F;6L*xt(!u)-?-|C;80N-hK1J9Y_W;)CTbT#$2hOX0 zFJtQ@##NDzzog{ZIQiYh7XRLU%Dr6N>(!@u-@QRM+qh(wXZ0X{D6))#?vA^oH*yrf!<;byaE8^NMTG0Jx+@bsp@W8J- z3N`<9VUwWip4GX1`Duw7>(%3ZRe13;<*V27pR!I8Z)C{wu2sO@Ilj}yI~(WhlumIJ zZx70yDxSC!!z2E}7>+M)X>qN^F@9%o&WQgMrx(n<=c>6=HTVvks=?luX~FN|ty>=3 zy0LxJ#`-6J@uYaHy?u6U)3$9L+kODd>i>j8H2;4Bz7xELoy2bs{7*n}yt!Pbpru>! zuC+;XL&uKDXYci0WBa5`-W#|*wIu$oSGm;&T4Bo?+-XdBSIcS;?qRpvo)H^|Oy4SN z;^dIYHjqpqn}Qc!(EXb7YWI`(T7v4M>OT$NG&R5bUxwQ@jGEk~OSGtSuv_0H>@~Z# z@*ja)eMePp?1Kxg)qk}-^x7@CF})PG)PDpq{{Ml`WW309(I>H@V_QQ~P(7l_yHMY|953BEN>fKG$XfXoObVxT5aJLoCU z4p0~9dC)=7Z$Ss5l=vJJ;{DNXK+EUu1M!(pf%x1xER2VVWpi`)f?qgyPJZw@^50)a re&{;#BiE51zmEL$HS!P9KLPq2^heN-L38^21pE#V>%%D$)rkHFa>1-@ diff --git a/uvm32/mini-rv32ima.h b/uvm32/mini-rv32ima.h index f3a3eab..d063c89 100644 --- a/uvm32/mini-rv32ima.h +++ b/uvm32/mini-rv32ima.h @@ -45,6 +45,7 @@ #define MINIRV32_HANDLE_MEM_LOAD_CONTROL(...); #endif +#ifndef MINIRV32_NO_ZICSR #ifndef MINIRV32_OTHERCSR_WRITE #define MINIRV32_OTHERCSR_WRITE(...); #endif @@ -52,6 +53,7 @@ #ifndef MINIRV32_OTHERCSR_READ #define MINIRV32_OTHERCSR_READ(...); #endif +#endif #ifndef MINIRV32_CUSTOM_MEMORY_BUS #define MINIRV32_STORE4( ofs, val ) *(uint32_t*)(image + ofs) = val @@ -82,6 +84,7 @@ struct MiniRV32IMAState uint32_t timermatchl; uint32_t timermatchh; #endif +#ifndef MINIRV32_NO_ZICSR uint32_t mscratch; uint32_t mtvec; uint32_t mie; @@ -90,6 +93,7 @@ struct MiniRV32IMAState uint32_t mepc; uint32_t mtval; uint32_t mcause; +#endif // Note: only a few bits are used. (Machine = 3, User = 0) // Bits 0..1 = privilege. @@ -342,6 +346,7 @@ MINIRV32_STEPPROTO { uint32_t csrno = ir >> 20; uint32_t microop = ( ir >> 12 ) & 0x7; +#ifndef MINIRV32_NO_ZICSR if( (microop & 3) ) // It's a Zicsr function. { int rs1imm = (ir >> 15) & 0x1f; @@ -407,9 +412,12 @@ MINIRV32_STEPPROTO break; } } - else if( microop == 0x0 ) // "SYSTEM" 0b000 + else +#endif + if( microop == 0x0 ) // "SYSTEM" 0b000 { rdid = 0; +#ifndef MINIRV32_NO_ZICSR if( ( ( csrno & 0xff ) == 0x02 ) ) // MRET { //https://raw.githubusercontent.com/riscv/virtual-memory/main/specs/663-Svpbmt.pdf @@ -420,7 +428,10 @@ MINIRV32_STEPPROTO SETCSR( mstatus , (( startmstatus & 0x80) >> 4) | ((startextraflags&3) << 11) | 0x80 ); SETCSR( extraflags, (startextraflags & ~3) | ((startmstatus >> 11) & 3) ); pc = CSR( mepc ) -4; - } else { + } + else +#endif + { switch (csrno) { case 0: trap = ( CSR( extraflags ) & 3) ? (11+1) : (8+1); // ECALL; 8 = "Environment call from U-mode"; 11 = "Environment call from M-mode" @@ -441,6 +452,7 @@ MINIRV32_STEPPROTO trap = (2+1); // Note micrrop 0b100 == undefined. break; } +#ifndef MINIRV32_NO_ATOMICS case 0x2f: // RV32A (0b00101111) { uint32_t rs1 = REG((ir >> 15) & 0x1f); @@ -487,6 +499,7 @@ MINIRV32_STEPPROTO } break; } +#endif default: trap = (2+1); // Fault: Invalid opcode. } diff --git a/uvm32/uvm32.h b/uvm32/uvm32.h index d3d2756..0f8b323 100644 --- a/uvm32/uvm32.h +++ b/uvm32/uvm32.h @@ -42,6 +42,8 @@ SOFTWARE. #define MINIRV32_DECORATE static #define MINIRV32_RETURN_TRAP #define MINIRV32_NO_TIMERS_NO_CYCLES +#define MINIRV32_NO_ZICSR +#define MINIRV32_NO_ATOMICS #define MINI_RV32_RAM_SIZE UVM32_MEMORY_SIZE #define MINIRV32_POSTEXEC(pc, ir, retval) {if (retval > 0) return retval;} uint32_t _uvm32_extramLoad(void *userdata, uint32_t addr, uint32_t accessTyp);