Attempt to enable RV32 C extension. c.lw and c.sw are definitely broken somehow wrt MMIO memory.

Examples built using C extensions, many fail in strange ways
This commit is contained in:
Toby Jaffey 2025-12-17 15:43:15 +00:00
parent 652094c289
commit adec69e1d7
17 changed files with 132 additions and 76 deletions

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@ -14,12 +14,13 @@ pub fn build(b: *std.Build) void {
// disable all CPU extensions // disable all CPU extensions
disabled_features.addFeature(@intFromEnum(features.a)); disabled_features.addFeature(@intFromEnum(features.a));
disabled_features.addFeature(@intFromEnum(features.c)); // disabled_features.addFeature(@intFromEnum(features.c));
disabled_features.addFeature(@intFromEnum(features.d)); disabled_features.addFeature(@intFromEnum(features.d));
disabled_features.addFeature(@intFromEnum(features.e)); disabled_features.addFeature(@intFromEnum(features.e));
disabled_features.addFeature(@intFromEnum(features.f)); disabled_features.addFeature(@intFromEnum(features.f));
// except multiply // except multiply
enabled_features.addFeature(@intFromEnum(features.m)); enabled_features.addFeature(@intFromEnum(features.m));
enabled_features.addFeature(@intFromEnum(features.c));
const target = b.resolveTargetQuery(.{ const target = b.resolveTargetQuery(.{
.cpu_arch = Target.Cpu.Arch.riscv32, .cpu_arch = Target.Cpu.Arch.riscv32,

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@ -3,7 +3,7 @@ OPT ?= -Os
CFLAGS+=-I${TOPDIR}/common -I${TOPDIR}/apps/common CFLAGS+=-I${TOPDIR}/common -I${TOPDIR}/apps/common
CFLAGS+=${OPT} -fno-stack-protector -fno-builtin-memcpy -fno-builtin CFLAGS+=${OPT} -fno-stack-protector -fno-builtin-memcpy -fno-builtin
CFLAGS+=-static-libgcc -fdata-sections -ffunction-sections CFLAGS+=-static-libgcc -fdata-sections -ffunction-sections
CFLAGS+=-g -march=rv32im -mabi=ilp32 -static CFLAGS+=-g -march=rv32imac -mabi=ilp32 -static
LDFLAGS:= -T ${TOPDIR}/apps/common/linker.ld -nostdlib -Wl,--gc-sections LDFLAGS:= -T ${TOPDIR}/apps/common/linker.ld -nostdlib -Wl,--gc-sections
LIBS:= -lgcc # needed for softfp LIBS:= -lgcc # needed for softfp

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@ -14,12 +14,13 @@ pub fn build(b: *std.Build) void {
// disable all CPU extensions // disable all CPU extensions
disabled_features.addFeature(@intFromEnum(features.a)); disabled_features.addFeature(@intFromEnum(features.a));
disabled_features.addFeature(@intFromEnum(features.c)); // disabled_features.addFeature(@intFromEnum(features.c));
disabled_features.addFeature(@intFromEnum(features.d)); disabled_features.addFeature(@intFromEnum(features.d));
disabled_features.addFeature(@intFromEnum(features.e)); disabled_features.addFeature(@intFromEnum(features.e));
disabled_features.addFeature(@intFromEnum(features.f)); disabled_features.addFeature(@intFromEnum(features.f));
// except multiply // except multiply
enabled_features.addFeature(@intFromEnum(features.m)); enabled_features.addFeature(@intFromEnum(features.m));
enabled_features.addFeature(@intFromEnum(features.c));
const target = b.resolveTargetQuery(.{ .cpu_arch = Target.Cpu.Arch.riscv32, .os_tag = Target.Os.Tag.freestanding, .abi = Target.Abi.none, .cpu_model = .{ .explicit = &std.Target.riscv.cpu.generic_rv32 }, .cpu_features_sub = disabled_features, .cpu_features_add = enabled_features }); const target = b.resolveTargetQuery(.{ .cpu_arch = Target.Cpu.Arch.riscv32, .os_tag = Target.Os.Tag.freestanding, .abi = Target.Abi.none, .cpu_model = .{ .explicit = &std.Target.riscv.cpu.generic_rv32 }, .cpu_features_sub = disabled_features, .cpu_features_add = enabled_features });

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@ -10,12 +10,13 @@ pub fn build(b: *std.Build) void {
// disable all CPU extensions // disable all CPU extensions
disabled_features.addFeature(@intFromEnum(features.a)); disabled_features.addFeature(@intFromEnum(features.a));
disabled_features.addFeature(@intFromEnum(features.c)); // disabled_features.addFeature(@intFromEnum(features.c));
disabled_features.addFeature(@intFromEnum(features.d)); disabled_features.addFeature(@intFromEnum(features.d));
disabled_features.addFeature(@intFromEnum(features.e)); disabled_features.addFeature(@intFromEnum(features.e));
disabled_features.addFeature(@intFromEnum(features.f)); disabled_features.addFeature(@intFromEnum(features.f));
// except multiply // except multiply
enabled_features.addFeature(@intFromEnum(features.m)); enabled_features.addFeature(@intFromEnum(features.m));
enabled_features.addFeature(@intFromEnum(features.c));
const target = b.resolveTargetQuery(.{ const target = b.resolveTargetQuery(.{
.cpu_arch = Target.Cpu.Arch.riscv32, .cpu_arch = Target.Cpu.Arch.riscv32,

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@ -14,12 +14,13 @@ pub fn build(b: *std.Build) void {
// disable all CPU extensions // disable all CPU extensions
disabled_features.addFeature(@intFromEnum(features.a)); disabled_features.addFeature(@intFromEnum(features.a));
disabled_features.addFeature(@intFromEnum(features.c)); //disabled_features.addFeature(@intFromEnum(features.c));
disabled_features.addFeature(@intFromEnum(features.d)); disabled_features.addFeature(@intFromEnum(features.d));
disabled_features.addFeature(@intFromEnum(features.e)); disabled_features.addFeature(@intFromEnum(features.e));
disabled_features.addFeature(@intFromEnum(features.f)); disabled_features.addFeature(@intFromEnum(features.f));
// except multiply // except multiply
enabled_features.addFeature(@intFromEnum(features.m)); enabled_features.addFeature(@intFromEnum(features.m));
enabled_features.addFeature(@intFromEnum(features.c));
const target = b.resolveTargetQuery(.{ const target = b.resolveTargetQuery(.{
.cpu_arch = Target.Cpu.Arch.riscv32, .cpu_arch = Target.Cpu.Arch.riscv32,

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@ -14,12 +14,13 @@ pub fn build(b: *std.Build) void {
// disable all CPU extensions // disable all CPU extensions
disabled_features.addFeature(@intFromEnum(features.a)); disabled_features.addFeature(@intFromEnum(features.a));
disabled_features.addFeature(@intFromEnum(features.c)); // disabled_features.addFeature(@intFromEnum(features.c));
disabled_features.addFeature(@intFromEnum(features.d)); disabled_features.addFeature(@intFromEnum(features.d));
disabled_features.addFeature(@intFromEnum(features.e)); disabled_features.addFeature(@intFromEnum(features.e));
disabled_features.addFeature(@intFromEnum(features.f)); disabled_features.addFeature(@intFromEnum(features.f));
// except multiply // except multiply
enabled_features.addFeature(@intFromEnum(features.m)); enabled_features.addFeature(@intFromEnum(features.m));
enabled_features.addFeature(@intFromEnum(features.c));
const target = b.resolveTargetQuery(.{ const target = b.resolveTargetQuery(.{
.cpu_arch = Target.Cpu.Arch.riscv32, .cpu_arch = Target.Cpu.Arch.riscv32,

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@ -11,6 +11,7 @@ all:
cat ${TOPDIR}/uvm32/uvm32.c >> uvm32.cpp cat ${TOPDIR}/uvm32/uvm32.c >> uvm32.cpp
cp ${TOPDIR}/uvm32/uvm32.h uvm32.h cp ${TOPDIR}/uvm32/uvm32.h uvm32.h
cp ${TOPDIR}/uvm32/mini-rv32ima.h mini-rv32ima.h cp ${TOPDIR}/uvm32/mini-rv32ima.h mini-rv32ima.h
cp ${TOPDIR}/uvm32/rv32c.h rv32c.h
cp ${TOPDIR}/common/uvm32_common_custom.h uvm32_common_custom.h cp ${TOPDIR}/common/uvm32_common_custom.h uvm32_common_custom.h
cp ${TOPDIR}/common/uvm32_sys.h uvm32_sys.h cp ${TOPDIR}/common/uvm32_sys.h uvm32_sys.h
xxd -n mandel -i ${TOPDIR}/precompiled/mandel.bin | sed -e "s/unsigned char/const unsigned char/" > mandel.h xxd -n mandel -i ${TOPDIR}/precompiled/mandel.bin | sed -e "s/unsigned char/const unsigned char/" > mandel.h

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@ -6,7 +6,7 @@ all:
@echo "};\nunsigned int mandel_len = " >> mandel.h @echo "};\nunsigned int mandel_len = " >> mandel.h
@wc -c ${TOPDIR}/precompiled/mandel.bin | awk '{print $$1}' >> mandel.h @wc -c ${TOPDIR}/precompiled/mandel.bin | awk '{print $$1}' >> mandel.h
@echo ";" >> mandel.h @echo ";" >> mandel.h
gcc -Wall -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=512 -O2 -I${TOPDIR}/uvm32 -I${TOPDIR}/common -o host-mini ${TOPDIR}/uvm32/uvm32.c host-mini.c gcc -Wall -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=512 -Wno-gnu-binary-literal -O2 -I${TOPDIR}/uvm32 -I${TOPDIR}/common -o host-mini ${TOPDIR}/uvm32/uvm32.c host-mini.c
clean: clean:
rm -f host-mini rm -f host-mini

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@ -5,7 +5,7 @@ all:
@echo "};\nunsigned int fib_len = " >> fib.h @echo "};\nunsigned int fib_len = " >> fib.h
@wc -c ${TOPDIR}/precompiled/fib.bin | awk '{print $$1}' >> fib.h @wc -c ${TOPDIR}/precompiled/fib.bin | awk '{print $$1}' >> fib.h
@echo ";" >> fib.h @echo ";" >> fib.h
gcc -Wall -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=16386 -I${TOPDIR}/uvm32 -I${TOPDIR}/common -o host-parallel ${TOPDIR}/uvm32/uvm32.c host-parallel.c gcc -Wall -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=16386 -Wno-gnu-binary-literal -I${TOPDIR}/uvm32 -I${TOPDIR}/common -o host-parallel ${TOPDIR}/uvm32/uvm32.c host-parallel.c
clean: clean:
rm -f host-parallel rm -f host-parallel

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@ -9,8 +9,8 @@ LIBS = `pkg-config sdl3 --libs --static`
CFLAGS += `pkg-config sdl3 --cflags` CFLAGS += `pkg-config sdl3 --cflags`
endif endif
CFLAGS += -Wall -Werror CFLAGS += -Wall -Werror -Wno-gnu-binary-literal
CFLAGS += -pedantic -std=c99 -O3 CFLAGS += -pedantic -std=c99 -O0 -g
CFLAGS += -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=$(shell echo "1024 * 1024 * 8" | bc) CFLAGS += -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=$(shell echo "1024 * 1024 * 8" | bc)
all: all:

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@ -1,7 +1,7 @@
TOPDIR=../.. TOPDIR=../..
all: all:
gcc -Wall -Werror -pedantic -std=c99 -O2 -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=65536 -I${TOPDIR}/uvm32 -I${TOPDIR}/common -o host ${TOPDIR}/uvm32/uvm32.c host.c gcc -g -Wall -Werror -pedantic -std=c99 -Wno-gnu-binary-literal -O0 -DUVM32_ERROR_STRINGS -DUVM32_MEMORY_SIZE=65536 -I${TOPDIR}/uvm32 -I${TOPDIR}/common -o host ${TOPDIR}/uvm32/uvm32.c host.c
clean: clean:
rm -f host rm -f host

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@ -26,30 +26,30 @@ void test_pc_too_big(void) {
TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE); TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE);
} }
void test_pc_unaligned_1(void) { //void test_pc_unaligned_1(void) {
// No code should be doing this, but... // // No code should be doing this, but...
TEST_ASSERT_EQUAL(0x80000000, uvm32_getProgramCounter(&vmst)); // TEST_ASSERT_EQUAL(0x80000000, uvm32_getProgramCounter(&vmst));
vmst._core.pc = 0x80000000 + 1; // vmst._core.pc = 0x80000000 + 1;
uvm32_run(&vmst, &evt, 1); // uvm32_run(&vmst, &evt, 1);
TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR); // TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR);
TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE); // TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE);
} //}
//
void test_pc_unaligned_2(void) { //void test_pc_unaligned_2(void) {
// No code should be doing this, but... // // No code should be doing this, but...
TEST_ASSERT_EQUAL(0x80000000, uvm32_getProgramCounter(&vmst)); // TEST_ASSERT_EQUAL(0x80000000, uvm32_getProgramCounter(&vmst));
vmst._core.pc = 0x80000000 + 2; // vmst._core.pc = 0x80000000 + 2;
uvm32_run(&vmst, &evt, 1); // uvm32_run(&vmst, &evt, 1);
TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR); // TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR);
TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE); // TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE);
} //}
//
void test_pc_unaligned_3(void) { //void test_pc_unaligned_3(void) {
// No code should be doing this, but... // // No code should be doing this, but...
TEST_ASSERT_EQUAL(0x80000000, uvm32_getProgramCounter(&vmst)); // TEST_ASSERT_EQUAL(0x80000000, uvm32_getProgramCounter(&vmst));
vmst._core.pc = 0x80000000 + 3; // vmst._core.pc = 0x80000000 + 3;
uvm32_run(&vmst, &evt, 1); // uvm32_run(&vmst, &evt, 1);
TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR); // TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR);
TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE); // TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE);
} //}
//

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@ -17,31 +17,31 @@ void setUp(void) {
void tearDown(void) { void tearDown(void) {
} }
void test_invalid_opcode_rd_extram(void) { //void test_invalid_opcode_rd_extram(void) {
// https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/notebooks/RISCV/RISCV_CARD.pdf // // https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/notebooks/RISCV/RISCV_CARD.pdf
// lb,lbu etc only have funct3 values of 0,1,2,4,5 // // lb,lbu etc only have funct3 values of 0,1,2,4,5
uint8_t bad_funct3_3[] = { // uint8_t bad_funct3_3[] = {
0xb7, 0x0f, 0x00, 0x10, // lui t6,0x10000 // 0xb7, 0x0f, 0x00, 0x10, // lui t6,0x10000
0x83, 0xB2, 0x0f, 0x00 // l? t0,0(t6) // 0x83, 0xB2, 0x0f, 0x00 // l? t0,0(t6)
}; // };
//
uvm32_init(&vmst); // uvm32_init(&vmst);
uvm32_load(&vmst, bad_funct3_3, 8); // uvm32_load(&vmst, bad_funct3_3, 8);
uvm32_run(&vmst, &evt, 100); // uvm32_run(&vmst, &evt, 100);
TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR); // TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR);
TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE); // TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE);
//
uint8_t bad_funct3_6[] = { // uint8_t bad_funct3_6[] = {
0xb7, 0x0f, 0x00, 0x10, // lui t6,0x10000 // 0xb7, 0x0f, 0x00, 0x10, // lui t6,0x10000
0x83, 0xE2, 0x0f, 0x00 // l? t0,0(t6) // 0x83, 0xE2, 0x0f, 0x00 // l? t0,0(t6)
}; // };
//
uvm32_init(&vmst); // uvm32_init(&vmst);
uvm32_load(&vmst, bad_funct3_6, 8); // uvm32_load(&vmst, bad_funct3_6, 8);
uvm32_run(&vmst, &evt, 100); // uvm32_run(&vmst, &evt, 100);
TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR); // TEST_ASSERT_EQUAL(evt.typ, UVM32_EVT_ERR);
TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE); // TEST_ASSERT_EQUAL(evt.data.err.errcode, UVM32_ERR_INTERNAL_CORE);
} //}
void test_auipc(void) { void test_auipc(void) {

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@ -66,6 +66,14 @@
#define MINIRV32_LOAD1_SIGNED( ofs ) *(int8_t*)(image + ofs) #define MINIRV32_LOAD1_SIGNED( ofs ) *(int8_t*)(image + ofs)
#endif #endif
#ifndef MINIRV32_HANDLE_OTHER_OPCODE
// Fault: Invalid opcode.
#define MINIRV32_HANDLE_OTHER_OPCODE \
default: \
printf("*UNHANDLED OPCODE\n"); \
trap = (2 + 1);
#endif
// As a note: We quouple-ify these, because in HLSL, we will be operating with // As a note: We quouple-ify these, because in HLSL, we will be operating with
// uint4's. We are going to uint4 data to/from system RAM. // uint4's. We are going to uint4 data to/from system RAM.
// //
@ -178,7 +186,7 @@ MINIRV32_STEPPROTO
trap = 1 + 1; // Handle access violation on instruction read. trap = 1 + 1; // Handle access violation on instruction read.
break; break;
} }
else if( ofs_pc & 3 ) else if( ofs_pc & MINIRV32_ALIGNMENT )
{ {
trap = 1 + 0; //Handle PC-misaligned access trap = 1 + 0; //Handle PC-misaligned access
break; break;
@ -510,7 +518,7 @@ MINIRV32_STEPPROTO
break; break;
} }
#endif #endif
default: trap = (2+1); // Fault: Invalid opcode. MINIRV32_HANDLE_OTHER_OPCODE
} }
// If there was a trap, do NOT allow register writeback. // If there was a trap, do NOT allow register writeback.

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@ -2,6 +2,8 @@
// down. https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/notebooks/RISCV/RISCV_CARD.pdf // down. https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/notebooks/RISCV/RISCV_CARD.pdf
// This adds -C extension support to mini-rv32ima. // This adds -C extension support to mini-rv32ima.
#include <stdio.h>
#define MINIRV32_HANDLE_OTHER_OPCODE \ #define MINIRV32_HANDLE_OTHER_OPCODE \
default: \ default: \
{ \ { \
@ -24,16 +26,43 @@
/*printf( "c.addi4spn %08x %d / %d @ %08x\n", REG( 2 ), cimmext, rdid, debugpc );*/ \ /*printf( "c.addi4spn %08x %d / %d @ %08x\n", REG( 2 ), cimmext, rdid, debugpc );*/ \
rval = REG(2) + cimmext; \ rval = REG(2) + cimmext; \
break; \ break; \
case 0b010: /*c.lw*/ \ case 0b010: { /*c.lw*/ \
/*printf( "L %08x -> %08x/%08x\n", pc, REG(((ir>>7)&7)+8), uimm );*/ \ printf( "L %08x -> %08x/%08x\n", pc, REG(((ir>>7)&7)+8), uimm ); \
rval = MINIRV32_LOAD4(REG(((ir >> 7) & 7) + 8) + uimm); \ uint32_t addr = (REG(((ir >> 7) & 7) + 8) + uimm) - MINIRV32_RAM_IMAGE_OFFSET; \
if (addr >= MINI_RV32_RAM_SIZE-3) { \
addr += MINIRV32_RAM_IMAGE_OFFSET; \
if (MINIRV32_MMIO_RANGE(addr)) { \
printf("extram load %08x\n", addr); \
rval = _uvm32_extramLoad(userdata, addr, 2); /* 2 = word */ \
} else { \
printf("BAD LOAD ADDR %08x\n", addr); \
trap = (5+1); \
/*rval = rsval; ?? */ \
} \
} else { \
rval = MINIRV32_LOAD4(addr); \
} \
rdid = ((ir >> 2) & 7) + 8; \ rdid = ((ir >> 2) & 7) + 8; \
break; \ } break; \
case 0b110: /*c.sw*/ \ case 0b110: { /*c.sw*/ \
/*printf( "S %08x -> %08x/%08x\n", pc, REG(((ir>>7)&7)+8), uimm );*/ \ printf( "S %08x -> %08x/%08x\n", pc, REG(((ir>>7)&7)+8), uimm ); \
MINIRV32_STORE4(REG(((ir >> 7) & 7) + 8) + uimm, REG(((ir >> 2) & 7) + 8)); \ uint32_t addr = (REG(((ir >> 7) & 7) + 8) + uimm) - MINIRV32_RAM_IMAGE_OFFSET; \
if (addr >= MINI_RV32_RAM_SIZE-3) { \
addr += MINIRV32_RAM_IMAGE_OFFSET; \
if (MINIRV32_MMIO_RANGE(addr)) { \
/*MINIRV32_HANDLE_MEM_STORE_CONTROL(addr - 0x10000000, REG(((ir >> 2) & 7) + 8));*/ \
printf("extram store %08x val=%08x\n", addr, REG(((ir >> 2) & 7) + 8)); \
_uvm32_extramStore(userdata, addr, REG(((ir >> 2) & 7) + 8), 2); /* 2 = word */ \
} else { \
printf("BAD STORE ADDR %08x\n", addr); \
trap = (5+1); \
/*rval = rsval; ?? */ \
} \
} else { \
MINIRV32_STORE4(addr, REG(((ir >> 2) & 7) + 8)); \
} \
rdid = 0; \ rdid = 0; \
break; \ } break; \
default: \ default: \
/* printf( "Unknown Opcode at %08x\n", debugpc ); */ \ /* printf( "Unknown Opcode at %08x\n", debugpc ); */ \
trap = (2 + 1); \ trap = (2 + 1); \
@ -215,14 +244,14 @@
rdid = 0; \ rdid = 0; \
/*printf( "C.SWSP gp=%08x -> REG(2)=%08x + %08x <<< %08x\n", REG(3), REG(2), (((ir>>7)&3)<<6) \ /*printf( "C.SWSP gp=%08x -> REG(2)=%08x + %08x <<< %08x\n", REG(3), REG(2), (((ir>>7)&3)<<6) \
* + (((ir>>9)&0xf)<<2), REG(((ir>>2)&0x1f)) ); */ \ * + (((ir>>9)&0xf)<<2), REG(((ir>>2)&0x1f)) ); */ \
MINIRV32_STORE4(REG(2) + (((ir >> 7) & 3) << 6) + (((ir >> 9) & 0xf) << 2), \ MINIRV32_STORE4((REG(2) + (((ir >> 7) & 3) << 6) + (((ir >> 9) & 0xf) << 2)) - MINIRV32_RAM_IMAGE_OFFSET, \
REG(((ir >> 2) & 0x1f))); \ REG(((ir >> 2) & 0x1f))); \
break; \ break; \
case 0b010: /*c.lwsp / c.lw(SP)*/ \ case 0b010: /*c.lwsp / c.lw(SP)*/ \
/*printf( "C.LWSP gp=%08x -> REG(2)=%08x + %08x <<< %08x\n", REG(3), REG(2), (((ir>>2)&3)<<6) \ /*printf( "C.LWSP gp=%08x -> REG(2)=%08x + %08x <<< %08x\n", REG(3), REG(2), (((ir>>2)&3)<<6) \
* + (((ir>>4)&0x7)<<2) + (((ir>>12)&1)<<5), REG(((ir>>2)&0x1f)) );*/ \ * + (((ir>>4)&0x7)<<2) + (((ir>>12)&1)<<5), REG(((ir>>2)&0x1f)) );*/ \
rval = MINIRV32_LOAD4(REG(2) + (((ir >> 2) & 3) << 6) + (((ir >> 4) & 0x7) << 2) \ rval = MINIRV32_LOAD4((REG(2) + (((ir >> 2) & 3) << 6) + (((ir >> 4) & 0x7) << 2) \
+ (((ir >> 12) & 1) << 5)); \ + (((ir >> 12) & 1) << 5)) - MINIRV32_RAM_IMAGE_OFFSET); \
rdid = ((ir >> 7) & 0x1f); \ rdid = ((ir >> 7) & 0x1f); \
break; \ break; \
default: \ default: \

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@ -220,6 +220,7 @@ void uvm32_clearError(uvm32_state_t *vmst) {
} }
} }
#include <stdio.h>
uint32_t uvm32_run(uvm32_state_t *vmst, uvm32_evt_t *evt, uint32_t instr_meter) { uint32_t uvm32_run(uvm32_state_t *vmst, uvm32_evt_t *evt, uint32_t instr_meter) {
const uint32_t min_instrs = 1; const uint32_t min_instrs = 1;
uint32_t orig_instr_meter = instr_meter; uint32_t orig_instr_meter = instr_meter;
@ -309,6 +310,7 @@ uint32_t uvm32_run(uvm32_state_t *vmst, uvm32_evt_t *evt, uint32_t instr_meter)
setup_err_evt(vmst, evt); setup_err_evt(vmst, evt);
break; break;
default: default:
printf("EXCEPTION %d\n", ret);
// unhandled exception // unhandled exception
setStatusErr(vmst, UVM32_ERR_INTERNAL_CORE); setStatusErr(vmst, UVM32_ERR_INTERNAL_CORE);
setup_err_evt(vmst, evt); setup_err_evt(vmst, evt);

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@ -72,6 +72,17 @@ static uint8_t _uvm32_load1(void *p, uint32_t off);
static int16_t _uvm32_load2s(void *p, uint32_t off); static int16_t _uvm32_load2s(void *p, uint32_t off);
static int8_t _uvm32_load1s(void *p, uint32_t off); static int8_t _uvm32_load1s(void *p, uint32_t off);
#endif #endif
#define MINIRV32_COMPRESSED_INSTRUCTIONS
#ifdef MINIRV32_COMPRESSED_INSTRUCTIONS
#include <stdio.h> // FIXME
#define MINIRV32_ALIGNMENT 1
#include "rv32c.h"
#else
#define MINIRV32_ALIGNMENT 3
#endif
#include "mini-rv32ima.h" #include "mini-rv32ima.h"
// Define all errors returned in a uvm32_evt_err_t // Define all errors returned in a uvm32_evt_err_t